Let R be a commutative ring with identity 1 and M be a unitary left R-module. A submodule N of an R-module M is said to be pure relative to submodule T of M (Simply T-pure) if for each ideal A of R, N?AM=AN+T?(N?AM). In this paper, the properties of the following concepts were studied: Pure essential submodules relative to submodule T of M (Simply T-pure essential),Pure closed submodules relative to submodule T of M (Simply T-pure closed) and relative pure complement submodule relative to submodule T of M (Simply T-pure complement) and T-purely extending. We prove that; Let M be a T-purely extending module and let N be a T-pure submodule of M. If M has the T-PIP, then N is T-purely extending.

This paper presents a fully computerized method to backup the router configuration file. The method consists of a friendly graphical interface programmed by Java programming language.

    The proposed method is compared with the two existing methods, namely: TFTP server method and Copy/Paste method. The comparison reveals that the proposed method has many advantages over the existing ones. The proposed method has been implemented on Cisco routers (series 2500, 2600 and 2800).

     The aim of this investigation is to present the idea of  SAH – ideal , closed SAH – ideal and closed SAH – ideal with respect to an element ,  and s-  of BH – algebra .

We detail and show  theorems which regulate the relationship between these ideas and provide some examples in BH – algebra .

Vapor-liquid equilibrium data are presented for the binary systems n-hexane - 1-propanol, benzene - 1-propanol and n-hexane – benzene at 760 mm of mercury pressure. In addition ternary data are presented at selected compositions with respect to the 1-propanol in the 1-propanol, benzene, n-hexane system at 760 mmHg. The results indicate the relative volatility of n-hexane relative to benzene increases appreciably with addition of 1-propanol.

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL). This HDL program is then used to configure an FPGA to implement the designed circuit.

The research is an article that teaches some classes of fully stable Banach - Å modules. By using Unital algebra studies the properties and characterizations of all classes of fully stable Banach - Å modules. All the results are existing, and they've been listed to complete the requested information.

     In this paper we tend to describe the notions of intuitionistic fuzzy asly ideal of ring indicated by (I. F.ASLY) ideal and, we will explore some properties and connections about this concept.

Let be a ring. Given two positive integers and , an module is said to be -presented, if there is an exact sequence of -modules with is -generated. A submodule of a right -module is said to be -pure in , if for every -Presented left -module the canonical map is a monomorphism. An -module has the -pure intersection property if the intersection of any two -pure submodules is again -pure. In this paper we give some characterizations, theorems and properties of modules with the -pure intersection property.

Let be a ring. Given two positive integers and , an module is said to be -presented, if there is an exact sequence of -modules with is -generated. A submodule of a right -module is said to be -pure in , if for every -Presented left -module the canonical map is a monomorphism. An -module has the -pure intersection property if the intersection of any two -pure submodules is again -pure. In this paper we give some characterizations, theorems and properties of modules with the -pure intersection property.

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL).
This HDL program is then used to configure an FPGA to implement the designed circuit.