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Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGA
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A load-shedding controller suitable for small to medium size loads is designed and implemented based on preprogrammed priorities and power consumption for individual loads. The main controller decides if a particular load can be switched ON or not according to the amount of available power generation, load consumption and loads priorities. When themaximum allowed power consumption is reached and the user want to deliver power to additional load, the controller will decide if this particular load should be denied receiving power if its priority is low. Otherwise, it can be granted to receive power if its priority is high and in this case lower priority loads are automatically switched OFF in order not to overload the power generation. The main idea of the proposed LS controller is to minimize the amount of the isolated load without overloading the power system. In this paper, three versions of load shedding controller were implemented using Altera DE2-115 FPGA; with number of loads equal 32, 64 and 128 for each controller.
 
 
 

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Publication Date
Tue Oct 29 2019
Journal Name
Journal Of Engineering
Demand Priority in a Power System With Wind Power Contribution Load Shedding Scheme Based
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The load shedding  scheme has been extensively implemented as a fast solution for unbalance conditions. Therefore, it's crucial to investigate supply-demand balancing in order to protect the network from collapsing and to sustain stability as possible, however its implementation is mostly undesirable. One of the solutions to minimize the amount of load shedding is the integration renewable energy  resources, such as wind power, in the electric power generation could contribute significantly to minimizing power cuts as it is ability to positively improving the stability of the electric grid. In this paper propose a method for shedding the load base on the priority demands with incorporating the wind po

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Publication Date
Fri Jul 21 2023
Journal Name
Journal Of Engineering
Design and Implementation of a Multiplier free FPGA based OFDM Transmitter
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Orthogonal Frequency Division Multiplexing (OFDM) is an efficient multi-carrier technique.The core operation in the OFDM systems is the FFT/IFFT unit that requires a large amount of hardware resources and processing delay. The developments in implementation techniques likes Field Programmable Gate Array (FPGA) technologies have made OFDM a feasible option. The goal of this paper is to design and implement an OFDM transmitter based on Altera FPGA using Quartus software. The proposed transmitter is carried out to simplify the Fourier transform calculation by using decoder instead of multipliers. After programming ALTERA DE2 FPGA kit with implemented project, several practical tests have been done starting from monitoring all the results of

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Publication Date
Tue Dec 13 2022
Journal Name
Lecture Notes In Networks And Systems
Design and FPGA Implementation of Matrix Multiplier Using DEMUX-RCA-Based Vedic Multiplier
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Publication Date
Fri Mar 01 2013
Journal Name
Journal Of Engineering
Design and Implementation of a Generalized N-Digit Binary-To-Decimal Converter on an FPGA Seven-Segment Display Using Verilog Hdl Design and Implementation of a Generalized N-Digit Binary-To-Decimal Converter on an FPGA Seven-Segment Display Using Verilog Hdl
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It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL). This HDL program is then used to configure an FPGA to implement the designed circuit.

Publication Date
Thu May 18 2023
Journal Name
Journal Of Engineering
Design and Implementation of a Generalized N-Digit Binary-To-Decimal Converter on an FPGA Seven-Segment Display Using Verilog Hdl
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It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL).
This HDL program is then used to configure an FPGA to implement the designed circuit.

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Publication Date
Sun Jun 01 2014
Journal Name
Baghdad Science Journal
A Proposed Agent System for Network Monitoring
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The traditional centralized network management approach presents severe efficiency and scalability limitations in large scale networks. The process of data collection and analysis typically involves huge transfers of management data to the manager which cause considerable network throughput and bottlenecks at the manager side. All these problems processed using the Agent technology as a solution to distribute the management functionality over the network elements. The proposed system consists of the server agent that is working together with clients agents to monitor the logging (off, on) of the clients computers and which user is working on it. file system watcher mechanism is used to indicate any change in files. The results were presente

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Publication Date
Mon Mar 08 2021
Journal Name
Journal Of Physics: Conference Series
Design and Implementation of a Moving Robot Equipped with an Arm and an FPGA to Deliver Objects between Two Positions
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Abstract<p>In this paper a system is designed and implemented using a Field Programmable Gate Array (FPGA) to move objects from a pick up location to a delivery location. This transportation of objects is done via a vehicle equipped with a robot arm and an FPGA. The path between the two locations is followed by recognizing a black line between them. The black line is sensed by Infrared sensors (IR) located on the front and on the back of the vehicle. The Robot was successfully implemented by programming the Field Programmable Gate Array with the designed system that was described as a state diagram and the robot operated properly.</p>
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Publication Date
Sat Dec 01 2018
Journal Name
International Journal Of Electrical And Computer Engineering (ijece)
Design and Implementation of a Contactless Smart House Network System
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The Internet of Things (IoT) technology is every object around us and it is used to connect these objects to the Internet to verify Machine to Machine (M2M) communication. The smart house system is the most important application of IoT technology; it is increase the quality of life and decrease the efforts. There were many problems that faced the existing smart house networking systems, including the high cost of implementation and upgrading, high power consumption, and supported limited features. Therefore, this paper presents the design and implementation of smart house network system (SHNS) using Raspberry Pi and Arduino platforms as network infrastructure with ZigBee technology as wireless communication. SHNS consists of two mai

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Publication Date
Sat Dec 17 2022
Journal Name
Scientometrics
Implementation of a new research indicator to QS ranking system
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Publication Date
Fri Mar 01 2019
Journal Name
Al-khwarizmi Engineering Journal
Design and Implementation of a Telemetry System for Environmental Applications
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The Environmental Data Acquisition Telemetry System is a versatile, flexible and economical means to accumulate data from multiple sensors at remote locations over an extended period of time; the data is normally transferred to the final destination and saved for further analysis.

This paper introduces the design and implementation of a simplified, economical and practical telemetry system to collect and transfer the environmental parameters (humidity, temperature, pressure etc.) from a remote location (Rural Area) to the processing and displaying unit.

To get a flexible and practical system, three data transfer methods (three systems) were proposed (including the design and implementation) for rural area services, the fi

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