Orthogonal Frequency Division Multiplexing (OFDM) is an efficient multi-carrier technique.The core operation in the OFDM systems is the FFT/IFFT unit that requires a large amount of hardware resources and processing delay. The developments in implementation techniques likes Field Programmable Gate Array (FPGA) technologies have made OFDM a feasible option. The goal of this paper is to design and implement an OFDM transmitter based on Altera FPGA using Quartus software. The proposed transmitter is carried out to simplify the Fourier transform calculation by using decoder instead of multipliers. After programming ALTERA DE2 FPGA kit with implemented project, several practical tests have been done starting from monitoring all the results of the implemented blocks (VHDL code) and compare them with corresponding results from simulation system implemented in matlab 2010a. The results of these practical tests show that the suggested approach gives a significant improvement in reducing complexity and processing delays (45 nsec) in comparison with the conventional implementations of OFDM transmitter.
The High Power Amplifiers (HPAs), which are used in wireless communication, are distinctly characterized by nonlinear properties. The linearity of the HPA can be accomplished by retreating an HPA to put it in a linear region on account of power performance loss. Meanwhile the Orthogonal Frequency Division Multiplex signal is very rough. Therefore, it will be required a large undo to the linear action area that leads to a vital loss in power efficiency. Thereby, back-off is not a positive solution. A Simplicial Canonical Piecewise-Linear (SCPWL) model based digital predistorters are widely employed to compensating the nonlinear distortion that introduced by a HPA component in OFDM technology. In this paper, the genetic al
... Show MoreChannel estimation (CE) is essential for wireless links but becomes progressively onerous as Fifth Generation (5G) Multi-Input Multi-Output (MIMO) systems and extensive fading expand the search space and increase latency. This study redefines CE support as the process of learning to deduce channel type and signal-tonoise ratio (SNR) directly from per-tone Orthogonal Frequency-Division Multiplexing (OFDM) observations,with blind channel state information (CSI). We trained a dual deep model that combined Convolutional Neural Networks (CNNs) with Bidirectional Recurrent Neural Networks (BRNNs). We used a lookup table (LUT) label for channel type (class indices instead of per-tap values) and ordinal supervision for SNR (0–20 dB,5-dB steps). T
... Show MoreIn this paper, tunable optical band-pass filters based on Polarization Maintaining Fiber –Mach Zehnder Interferometer presented. Tunability of the band-pass filter implemented by applying different mechanical forces N on the micro-cavities splicing regions (MCSRs). The micro-cavity formed by using three variable-lengths of single-mode polarization-maintaining fiber with (8, 16, 24) cm lengths, splice between two segments of (SMF-28) with (26, 13) cm lengths, using the fusion splicing technique. Ellipsoidal shape micro-cavities experimentally achieved parallel to the propagation axis having dimensions between (12-24) μm of width and (4-12) μm of length. A micro-cavity with width and length as high as 24 μm and 12 μ
... Show MoreIn this paper, introduce a proposed multi-level pseudo-random sequence generator (MLPN). Characterized by its flexibility in changing generated pseudo noise (PN) sequence according to a key between transmitter and receiver. Also, introduce derive of the mathematical model for the MLPN generator. This method is called multi-level because it uses more than PN sequence arranged as levels to generation the pseudo-random sequence. This work introduces a graphical method describe the data processing through MLPN generation. This MLPN sequence can be changed according to changing the key between transmitter and receiver. The MLPN provides different pseudo-random sequence lengths. This work provides the ability to implement MLPN practically
... Show MoreThis research aims to design a high-speed laser diode driver and photodetector, the result is the
design of the high-speed laser diode driver with a short pulse of 10 ns at 30 KHz frequency and the
delivered maximum pulse voltage is 5.5 mV. Also, its optical output power of the laser diode driver is
about 2.529 mW for the centroied wavelength 1546.7 nm with FWHM of 286 pm and (1270-1610) nm.
The design of the circuit based on bipolar transistor where the input pulse signal is simply generated by
an arduino kit with 15 kHz frequency and then compensated to trigger to small signal amplifier which
was is simply NPN C3355 transistor and the output is a current driver to the laser diode. OptiSystem
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