Objective: To assess the Impact of Socio-economic status on age at menarche among secondary school students at
AL-Dora city in Baghdad, Iraq.
Methodology: This is a cross sectional study with multi-stage sampling was carried out during the period from the
3
th of December2013 to 12th of March 2014. The Sample comprised of 1760 girls, 1510 girls from urban area and
250 from rural area was included in the study. In first stage, selection of schools was done, and one class was
selected randomly from each level of Education, The data collection through a special questionnaire which Contain
the age of girl by year, class level, birth order, number of household, number of rooms, residency (urban/rural),
education level of parents, occupation of parents.
Results: The study showed that the mean age at menarche for adolescent secondary school girls in Al-Dora
was12.49±0.99 years, and the mean age at menarche of girls living in the urban area were 12.4±1.0 while 12.9±1.1
year for girls living in the rural area, which give a significant association, so the girls from urban area had earlier
menarche age than rural area, and earlier age at menarche of those girls who had fewer number of siblings than
those who had more siblings, Also the study discovered an earlier age at menarche in those girls whose Parents’
had a high educational level, occupation of mothers, While there was no association between occupation of father
and age at menarche.
Recommendation: According to the findings of the present study we recommended to further elaborated study is
required to estimate the age of menarche of Iraqi girls, because menarche age can vary by location, it may not be
possible to generalize these results to other communities in the Iraq government
In this paper, a simulation of the electrical performance for Pentacene-based top-contact bottom-gate (TCBG) Organic Field-Effect Transistors (OFET) model with Polymethyl methacrylate (PMMA) and silicon nitride (Si3N4) as gate dielectrics was studied. The effects of gate dielectrics thickness on the device performance were investigated. The thickness of the two gate dielectric materials was in the range of 100-200nm to maintain a large current density and stable performance. MATLAB simulation demonstrated for model simulation results in terms of output and transfer characteristics for drain current and the transconductance. The layer thickness of 200nm may result in gate leakage current points to the requirement of optimizing the t
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