A particle swarm optimization algorithm and neural network like self-tuning PID controller for CSTR system is presented. The scheme of the discrete-time PID control structure is based on neural network and tuned the parameters of the PID controller by using a particle swarm optimization PSO technique as a simple and fast training algorithm. The proposed method has advantage that it is not necessary to use a combined structure of identification and decision because it used PSO. Simulation results show the effectiveness of the proposed adaptive PID neural control algorithm in terms of minimum tracking error and smoothness control signal obtained for non-linear dynamical CSTR system.

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL).
This HDL program is then used to configure an FPGA to implement the designed circuit.

An intrusion detection system (IDS) is key to having a comprehensive cybersecurity solution against any attack, and artificial intelligence techniques have been combined with all the features of the IoT to improve security. In response to this, in this research, an IDS technique driven by a modified random forest algorithm has been formulated to improve the system for IoT. To this end, the target is made as one-hot encoding, bootstrapping with less redundancy, adding a hybrid features selection method into the random forest algorithm, and modifying the ranking stage in the random forest algorithm. Furthermore, three datasets have been used in this research, IoTID20, UNSW-NB15, and IoT-23. The results are compared with the three datasets men

This paper proposes an on-line adaptive digital Proportional Integral Derivative (PID) control algorithm based on Field Programmable Gate Array (FPGA) for Proton Exchange Membrane Fuel Cell (PEMFC) Model. This research aims to design and implement Neural Network like a digital PID using FPGA in order to generate the best value of the hydrogen partial pressure action (PH₂) to control the stack terminal output voltage of the (PEMFC) model during a variable load current applied. The on-line Particle Swarm Optimization (PSO) algorithm is used for finding and tuning the optimal value of the digital PID-NN controller (kp, ki, and kd) parameters that improve the dynamic behavior of the closed-loop digital control fue

Background and Aim: due to the rapid growth of data communication and multimedia system applications, security becomes a critical issue in the communication and storage of images. This study aims to improve encryption and decryption for various types of images by decreasing time consumption and strengthening security. Methodology: An algorithm is proposed for encrypting images based on the Carlisle Adams and Stafford Tavares CAST block cipher algorithm with 3D and 2D logistic maps. A chaotic function that increases the randomness in the encrypted data and images, thereby breaking the relation sequence through the encryption procedure, is introduced. The time is decreased by using three secure and private S-Boxes rather than using si

Artificial Intelligence Algorithms have been used in recent years in many scientific fields. We suggest employing flower pollination algorithm in the environmental field to find the best estimate of the semi-parametric regression function with measurement errors in the explanatory variables and the dependent variable, where measurement errors appear frequently in fields such as chemistry, biological sciences, medicine, and epidemiological studies, rather than an exact measurement. We estimate the regression function of the semi-parametric model by estimating the parametric model and estimating the non-parametric model, the parametric model is estimated by using an instrumental variables method (Wald method, Bartlett’s method, and Durbin

In this work, the performance of the receiver in a quantum cryptography system based on BB84 protocol is scaled by calculating the Quantum Bit Error Rate (QBER) of the receiver. To apply this performance test, an optical setup was arranged and a circuit was designed and implemented to calculate the QBER. This electronic circuit is used to calculate the number of counts per second generated by the avalanche photodiodes set in the receiver. The calculated counts per second are used to calculate the QBER for the receiver that gives an indication for the performance of the receiver. Minimum QBER, 6%, was obtained with avalanche photodiode excess voltage equals to 2V and laser diode power of 3.16 nW at avalanche photodiode temperature of -10