European Chemical Bulletin (ISSN 2063-5346) is a peer-reviewed journal that publishes original research papers, short communications, and review articles in all areas of chemistry. European Chemical Bulletin has eight sections, namely

This study deals with the elimination of methyl orange (MO) from an aqueous solution by utilizing the 3D electroFenton process in a batch reactor with an anode of porous graphite and a cathode of copper foam in the presence of granular activated carbon (GAC) as a third pole, besides, employing response surface methodology (RSM) in combination with Box-Behnk Design (BBD) for studying the effects of operational conditions, such as current density (3–8 mA/cm2), electrolysis time (10–20 min), and the amount of GAC (1–3 g) on the removal efficiency beside to their interaction. The model was veiled since the value of R2 was high (>0.98) and the current density had the greatest influence on the response. The best removal efficiency (MO Re%)

This study presents the debonding propagation in single NiTi wire shape memory alloy into linear low-density polyethylene matrix composite the study of using the pull-out test. The aim of this study is to investigate the pull-out tests to check the interfacial strength of the polymer composite in two cases, with activation NiTinol wire and without activation. In this study, shape memory alloy NiTinol wire 2 mm diameter and linear fully annealed straight shape were used. The study involved experimental and finite element analysis and eventually comparison between them. This pull-out test is considered a substantial test because its results have a relation with behavior of smart composite materials. The pull-out test was carried out by a u

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL).
This HDL program is then used to configure an FPGA to implement the designed circuit.