Poly (viny1 alcohol) (PVA) of 72000 g mol -1 molar mass was cross linked through cold cast esterification with different mol % of MA and EDTA (10 % , 20 % and 30 % ), and two different mol % mixture of MA l EDTA (20 %/5% and 20%/10% .

       The current research aims to build a training program for chemistry teachers based on the knowledge economy and its impact on the productive thinking of their students. To achieve the objectives of the research, the following hypothesis was formulated:

   There is no statistically significant difference at (0.05) level of significance between the average grades of the students participating in the training program according to the knowledge economy and the average grades of the students who did not participate in the training program in the test of productive thinking. The study sample consisted of (288) second intermediate grade students divided into (152) for the control group

This paper studies the main characteristics of the traditional urban configuration of Arab cities, as an important built heritage, discussing the approach adopted with such configuration at the local level, and examines its ability to preserve the character of the city, as well as, its responsiveness to the recent  requirements of its society that constantly change; in order to reach the appropriate procedures to deal with the traditional urban configuration of the Iraqi city to achieve a vital cultural communication with the vernacular built heritage, by dealing with the Form-Moral Values structure. Due to its importance within other traditional Iraqi cities, the research chose Al-Kadhimiya as a case study, so it discusses and compares

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL).
This HDL program is then used to configure an FPGA to implement the designed circuit.