Arcology is a new vision of urban design for densely populated settlements. It is referred to as the urban formation aimed at achieving the highest level of utilization in the least area of land to reduce human impact on the environment. Moreover, the integration of this formation with the environment will work to reduce energy consumption, and achieve an economy that is characterized by adaptation and self-sufficiency, leading towards sustainable urbanism. The current study deals with this new concept in sustainable urban design, in an attempt to investigate its impact on traditional urban formation and to make a comparison between them. The lack of a clear conception of the term ‘arcology’ and comparing it with the organic compact urb

The logistic regression model is an important statistical model showing the relationship between the binary variable and the explanatory variables.                                                        The large number of explanations that are usually used to illustrate the response led to the emergence of the problem of linear multiplicity between the explanatory variables that make estimating the parameters of the model not accurate.    

A nano manganese dioxide (MnO₂) was electrodeposited galvanostatically onto a carbon fiber (CF) surface using the simple method of anodic electrodeposition. The composite electrode was characterized by field emission scanning electron microscopy (FESEM), and X-ray diffraction (XRD). Very few studies investigated the efficiency of this electrode for heavy metals removal, especially chromium. The electrosorption properties of the nano MnO₂/CF electrode were examined by removing Cr(VI) ions from aqueous solutions. NaCl concentration, pH, and cell voltage were studied and optimized using the Box-Behnken design (BDD) to investigate their effects and interactions on the electrosorption process. The results showed that the

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL).
This HDL program is then used to configure an FPGA to implement the designed circuit.