In this paper, a single-phase boost type ac-dc converter with power factor correction (PFC) technique is designed and implemented. A current mode control at a constant switching frequency is used as a control strategy for PFC converter. The PFC converter is a single-stage singleswitch boost converter that uses a current shaping technique to reshape the non-sinusoidal input current drawn by the bulky capacitor in the conventional rectifier. This technique should provide an input current with almost free-harmonics, comply with the IEC61000-3-2 limits, and a system operates with near unity power factor. The other function of the boost converter that should be
accomplished is to provide a regulated DC output voltage. The complete designed

The adsorption of Cr (VI) from aqueous solution by spent tea leaves (STL) was studied at different initial Cr (VI) concentrations, adsorbent dose, pH and contact time under batch isotherm experiments The adsorption experiments were carried out at 30°C and the effects of the four parameters on chromium uptake to establish a mathematical model description percentage removal of Cr (VI). The
analysis results showed that the experimental data were adequately fitted to second order polynomial model with correlation coefficients for this model was (R2 = 0.9891). The optimum operating parameters of initial Cr (VI) concentrations, adsorbent dose, pH and contact time were 50 mg/l, 0.7625 g, 3 and 100 min, respectively. At these conditions, th

The paper presents a highly accurate power flow solution, reducing the possibility of ending at local minima, by using Real-Coded Genetic Algorithm (RCGA) with system reduction and restoration. The proposed method (RCGA) is modified to reduce the total computing time by reducing the system in size to that of the generator buses, which, for any realistic system, will be smaller in number, and the load buses are eliminated. Then solving the power flow problem for the generator buses only by real-coded GA to calculate the voltage phase angles, whereas the voltage magnitudes are specified resulted in reduced computation time for the solution. Then the system is restored by calculating the voltages of the load buses in terms

The load shedding  scheme has been extensively implemented as a fast solution for unbalance conditions. Therefore, it's crucial to investigate supply-demand balancing in order to protect the network from collapsing and to sustain stability as possible, however its implementation is mostly undesirable. One of the solutions to minimize the amount of load shedding is the integration renewable energy  resources, such as wind power, in the electric power generation could contribute significantly to minimizing power cuts as it is ability to positively improving the stability of the electric grid. In this paper propose a method for shedding the load base on the priority demands with incorporating the wind po

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL). This HDL program is then used to configure an FPGA to implement the designed circuit.

     Minimizing the power consumption of electronic systems is one of the most critical concerns in the design of integrated circuits for very large-scale integration (VLSI). Despite the reality that VLSI design is known for its compact size, low power, low price, excellent dependability, and high functionality, the design stage remains difficult to improve in terms of time and power. Several optimization algorithms have been designed to tackle the present issues in VLSI design. This study discusses a bi-objective optimization technique for circuit partitioning based on a genetic algorithm. The motivation for the proposed research is derived from the basic concept that, if some portions of a circuit's system are deactivated during th

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL).
This HDL program is then used to configure an FPGA to implement the designed circuit.

Four photosensitizers were used to test inhibitory effect of Helicobacter pylori bacteria using
low power helium: neon red laser radiation. Biopsies were collected from 176 patients and H. pylori were
isolated, identified and bacterial suspension was prepared. Samples of this suspension were mixed with
various low concentrations of the test sensitizer. The mixture samples were exposed to different laser
radiation doses. The samples were then inoculated and the inhibition zones were studied and compared
with their analogues of control samples. The most effective sensitizer with optimum concentration and
irradiation dose was determined. Statistical analysis of results was performed. The sensitizers' toluidine
blue and

In this paper a new structure for the AVR of the power system exciter is proposed and designed using digital-based LQR. With two weighting matrices R and Q,  this method produces an optimal regulator that is used to generate the feedback control law. These matrices are called state and control weighting matrices and are used to balance between the relative importance of the input and the states in the cost function that is being optimized. A sample power system composed of single machine connected to an infinite- bus bar (SMIB) with both a conventional and a proposed Digital AVR (DAVR) is simulated. Evaluation results show that the DAVR damps well the oscillations of the terminal voltage and presents a faster respo