High cost of qualifying library standard cells on silicon wafer limits the number of test circuits on the test chip. This paper proposes a technique to share common load circuits among test circuits to reduce the silicon area. By enabling the load sharing, number of transistors for the common load can be reduced significantly. Results show up to 80% reduction in silicon area due to load area reduction.

Given the importance of increasing economic openness transport companies’ face various issues arising at present time, this required importing different types of goods with different means of transport. Therefore, these companies pay great attention to reducing total costs of transporting commodities by using numbers means of transport methods from their sources to the destinations. The majority of private companies do not acquire the knowledge of using operations research methods, especially transport models, through which the total costs can be reduced, resulting in the importance and need to solve such a problem. This research presents a proposed method for the sum of Total Costs (Tc) of rows and columns, in order to arrive at the init

The new sustainable development goals set by the UN include a goal of making cities inclusive, safe, sustainable, and resilient. Cities are growing at huge rates, and conditions of deteriorating QOL̛s are increasing in the form of poor access to services, and slums are remarkable, especially in the cities of the Middle East; hence, the research problem can arise from a lack of knowledge regarding the in determination of a way to assess the resilience of cities to develop mechanisms that will improve the quality of urban life. In this study, a tool called CRF has been applied for the assessment of the city's resilience principles of health and quality of life, economics and social, infrastructure and environmental systems, and the principle

The Ge0.4Te0.6 alloy has been prepared. Thin films of Ge0.4Te0.6 has been prepared via a thermal evaporation method with 4000A thickness, and rate of deposition (4.2) A/sec at pressure 2x10-6 Torr. The A.C electrical conductivity of a-Ge0.4Te0.6 thin films has been studied as a function of frequency for annealing temperature within the range (423-623) K, the deduced exponent s values, was found to decrease with increasing of annealing temperature through the frequency of the range (102-106) Hz. It was found that, the correlated barrier hopping (CBH) is the dominant conduction mechanism. Values of dielectric constant ε1 and dielectric loss ε2 were found to decrease with frequency and increase with temperature. The activation energies have