In this work, porous Silicon structures are formed with photochemical etching process of n-type Silicon(111) wafers of resistivity (0.02.cm) in hydrofluoric acid (HF) of concentration (39%wt) under light source of tungeston halogen lamp of (100 Watt) power. Samples were anodized in a solution of 39%HF and ethanol at 1:1 for 15 minutes. The samples were realized on n-type Si substrates Porous Silicon layers of 100m thickness and 30% of porousity. Frequency dependence of conductivity for Al/PSi/Si/Al sandwich form was studied. A frequency range of 102-106Hz was used allowing an accurate determination of the impedance components. Their electronic transport parameters were determined using complex impedance measurements. These measurements provide a powerful tool for interpretation of basic properties such as the dielectric constant, polarizibility and frequency dependence in the crystallites and trapping mechanisms. The electrical conductivity is mainly controlled by hoping transport on localized states in the chaotic porous structure
In this paper the queuing system (M/Er/1/N) has been considered in equilibrium. The method of stages introduced by Erlang has been used. The system of equations which governs the equilibrium probabilities of various stages has been given. For general N the probability of j stages of service are left in the system, has been introduced. And the probability for the empty system has been calculated in the explicit form.
Ab – initio density function theory (DFT) calculations coupled with Large Unit Cell (LUC) method were carried out to evaluate the electronic structure properties of III-V zinc blend (GaAs). The nano – scale that have dimension (1.56-2.04)nm. The Gaussian 03 computational packages has been employed through out this study to compute the electronic properties include lattice constant, energy gap, valence and conduction band width, total energy, cohesive energy and density of state etc. Results show that the total energy and energy gap are decreasing with increase the size of nano crystal . Results revealed that electronic properties converge to some limit as the size of LUC increase .
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Asphaltenes are a solubility class described as a component of crude oil with undesired characteristics. In this study, Sharqy Baghdad heavy oil upgrading was achieved utilizing the solvent deasphalting approach as asphaltenes are insoluble in paraffinic solvents; they may be removed from heavy crude oil by adding N-Hexane as a solvent to create deasphalted oil (DAO)of higher quality. This method is known as Solvent De-asphalting (SDA). Different effects have been assessed for the SDA process, such as solvent to oil ratio (4-16/1 ml/g), the extraction temperature (23 ºC) room temperature and (68 ºC) reflux temperature at (0.5 h mixing time with 400 rpm mixing speed). The best solvent deasphalting results were obtained at room temp
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Research has included preparation of three of n Vthal acids Amec Bmentoj high of interaction vehicles Ortometta and bar aminophenol with phthalic anhydride was withdrawn water and ring closure of acids Alvthal AMEC prepared
In this paper, we will introduce the concept of interval value fuzzy n-fold KU-ideal in KU-algebras, which is a generalization of interval value fuzzy KU-ideal of KU-algebras and we will obtain few properties that is similar to the properties of interval value fuzzy KU-ideal in KU-algebras, see [8]. Also, we construct some algorithms for folding theory applied to KU-ideals in KU-algebras.
In this paper, we characterize normal composition operators induced by holomorphic self-map , when and .Moreover, we study other related classes of operators, and then we generalize these results to polynomials of degree n.
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In this paper Zener diode was manufactured using ZnO-CuO-ZnO/Si heterojunction structure that used laser induced plasma technique to prepare the nanofilms. Six samples were prepared with a different number of laser pulses, started with 200 to 600 pulses on ZnO tablet with fixed the number of laser pulses on CuO tablet at 300 pulses. The pulse energy of laser deposited was 900mJ using ZnO tablet and 600mJ using CuO tablet. All prepared films shown good behavior as Zener diode when using porous silicon as substrate.
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The paper reports the influence of annealing temperature under vacuum for one hour on the some structural and electrical properties of p-type CdTe thin films were grown at room temperature under high vacuum by using thermal evaporation technique with a mean thickness about 600nm. X-ray diffraction analysis confirms the formation of CdTe cubic phase at all annealing temperature. From investigated the electrical properties of CdTe thin films, the electrical conductivity, the majority carrier concentration, and the Hall mobility were found increase with increasing annealing temperatures.