This research  describes the design & implementation of frequency synthesizer using single loop Phase lock loop with the following specifications: Frequency range (1.5 – 2.75) GHz,Step size (1 MHz), Switching time 36.4 µs, & phase noise @10 kHz = -92dBc & spurious -100 dBc

  The development in I.C. technology provide the simplicity in the design of frequency synthesizer because it implements the phase frequency detector(PFD) , prescalar &  reference divider in single chip. Therefore our system consists of  a single chip contains (low phase noise PFD, charge pump, prescalar  & reference divider), voltage controlled oscillator , loop filter & reference oscillator. The single chip

A compact microstrip six-port reflectometer (SPR) with extended bandwidth is proposed in this paper. The design is based on using 16-dB multi-section coupled line directional couplers and a multi-section 3-dB Wilkinson power divider operating from 1 to 6 GHz. The proposed SPR employs only two calibration standards: a matched load and an open load. As compared to other dielectric substrates, fabricating the proposed SPR involves using a low-cost (FR4) substrate. A novel algorithm is also proposed to estimate the complex reflection coefficient over the frequency ranges at which the standard performance of the circuit components is not fully satisfied. The new algorithm is based on the circles’ intersection points, which have been de

<span lang="EN-US">We are living in the 21^st century, an era of acquiring necessity in one click. As we, all know that technology is continuously reviving to stay ahead of advancements taking place in this world of making things easier for mankind. Technology has been putting his part in introducing different projects as we have used the field programmable gate arrays (FPGAs) development board of low cost and programmable logic done by the new evolvable cyclone software is optimized for specific energy based on Altera Cyclone II (EP2C5T144) through which we can control the speed of any electronic device or any Motor Control IP product targeted for the fan and pump. Altera Cyclone FPGAs’ is a board thro

Single-photon detection concept is the most crucial factor that determines the performance of quantum key distribution (QKD) systems. In this paper, a simulator with time domain visualizers and configurable parameters using continuous time simulation approach is presented for modeling and investigating the performance of single-photon detectors operating in Gieger mode at the wavelength of 830 nm. The widely used C30921S silicon avalanche photodiode was modeled in terms of avalanche pulse, the effect of experiment conditions such as excess voltage, temperature and average photon number on the photon detection efficiency, dark count rate and afterpulse probability. This work shows a general repeatable modeling process for significant perform

To damp the low-frequency oscillations which occurred due to the disturbances in the electrical power system, the generators are equipped with Power System Stabilizer (PSS) that provide supplementary feedback stabilizing signals. The low-frequency oscillations in power system are classified as local mode oscillations, intra-area mode oscillation, and interarea mode oscillations. A suitable PSS model was selected considering the low frequencies oscillation in the inter-area mode based on conventional PSS and Fuzzy Logic Controller. Two types of (FIS) Mamdani and suggeno were considered in this paper. The software of the methods was executed using MATLAB R2015a package.

Laser is a powerful device that has a wide range of applications in fields ranging from materials science and manufacturing to medicine and fibre optic communications. One remarkable

In this paper a new structure for the AVR of the power system exciter is proposed and designed using digital-based LQR. With two weighting matrices R and Q,  this method produces an optimal regulator that is used to generate the feedback control law. These matrices are called state and control weighting matrices and are used to balance between the relative importance of the input and the states in the cost function that is being optimized. A sample power system composed of single machine connected to an infinite- bus bar (SMIB) with both a conventional and a proposed Digital AVR (DAVR) is simulated. Evaluation results show that the DAVR damps well the oscillations of the terminal voltage and presents a faster respo

Symmetric cryptography forms the backbone of secure data communication and storage by relying on the strength and randomness of cryptographic keys. This increases complexity, enhances cryptographic systems' overall robustness, and is immune to various attacks. The present work proposes a hybrid model based on the Latin square matrix (LSM) and subtractive random number generator (SRNG) algorithms for producing random keys. The hybrid model enhances the security of the cipher key against different attacks and increases the degree of diffusion. Different key lengths can also be generated based on the algorithm without compromising security. It comprises two phases. The first phase generates a seed value that depends on producing a rand