The paper presents the design of a system consisting of a solar panel with Single Input/Multiple Outputs (DC-DC) Buck Converter by using Simulink dialogue box tools in MATLAB software package for simulation the system. Maximum Power Point Tracking (MPPT) technique depending on Perturb and Observe (P&O) algorithm is used to control the output power of the converter and increase the efficiency of the system. The characteristics of the MSX-60 PV module is chosen in design of the system, whereas the electrical characteristics (P-V, I-V and P-I curves) for the module are achieved, that is affected by the solar radiation and temperature variations. The proposed design module has been found to be stable for any change in atmospheric tempera

Software testing is a vital part of the software development life cycle. In many cases, the system under test has more than one input making the testing efforts for every exhaustive combination impossible (i.e. the time of execution of the test case can be outrageously long). Combinatorial testing offers an alternative to exhaustive testing via considering the interaction of input values for every t-way combination between parameters. Combinatorial testing can be divided into three types which are uniform strength interaction, variable strength interaction and input-output based relation (IOR). IOR combinatorial testing only tests for the important combinations selected by the tester. Most of the researches in combinatorial testing

Software testing is a vital part of the software development life cycle. In many cases, the system under test has more than one input making the testing efforts for every exhaustive combination impossible (i.e. the time of execution of the test case can be outrageously long). Combinatorial testing offers an alternative to exhaustive testing via considering the interaction of input values for every t-way combination between parameters. Combinatorial testing can be divided into three types which are uniform strength interaction, variable strength interaction and input-output based relation (IOR). IOR combinatorial testing only tests for the important combinations selected by the tester. Most of the researches in combinatorial testing appli

Achieving reliable operation under the influence of deep-submicrometer noise sources including crosstalk noise at low voltage operation is a major challenge for network on chip links. In this paper, we propose a coding scheme that simultaneously addresses crosstalk effects on signal delay and detects up to seven random errors through wire duplication and simple parity checks calculated over the rows and columns of the two-dimensional data. This high error detection capability enables the reduction of operating voltage on the wire leading to energy saving. The results show that the proposed scheme reduces the energy consumption up to 53% as compared to other schemes at iso-reliability performance despite the increase in the overhead number o

With the shift of narration and the revolution against the traditional methods which were dominated by the authorial intrusion and the single narrative voice, there appeared new forms that go along with the change in methods of narration. Form becomes the representation which equips us to understand more fully aspects of existence outside of art. Form is the objectifying of idea, and its excellence depends upon its appropriateness to the idea.¹ One of the most important approaches to writing fiction is the power of point of view.

In the strategy of 'point of view' lies the secret of art and, as Norman Friedman indicates, it provides a method for distinguishing the possible degrees of authorial extinction in the narrati

In this paper, we present multiple bit error correction coding scheme based on extended Hamming product code combined with type II HARQ using shared resources for on chip interconnect. The shared resources reduce the hardware complexity of the encoder and decoder compared to the existing three stages iterative decoding method for on chip interconnects. The proposed method of decoding achieves 20% and 28% reduction in area and power consumption respectively, with only small increase in decoder delay compared to the existing three stage iterative decoding scheme for multiple bit error correction. The proposed code also achieves excellent improvement in residual flit error rate and up to 58% of total power consumption compared to the other err